1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly, to the preparation of active elements for use in semiconductor devices.
2. Related Art
An interest exists in industry in developing low cost electronics, and in particular, in developing low cost, large area electronic devices. Availability of such large area electronic devices could revolutionize a variety of technology areas, ranging from civil to military applications. Example applications for such devices include driving circuitry for active matrix liquid crystal displays (LCDs) and other types of matrix displays, smart libraries, credit cards, radio-frequency identification tags for smart price and inventory tags, security screening/surveillance or highway traffic monitoring systems, large area sensor arrays, and the like.
Current approaches involve using amorphous silicon or organic semiconductors as the base materials for electronic devices, such as thin-film transistors (TFTs). However, amorphous silicon and organic semiconductors have performance limitations. For example, they exhibit low carrier mobility, typically about 1 cm2/V_s (centimeter squared per volt second) or less. Furthermore, they require relatively expensive processes, such as laser induced annealing, to improve their performance.
An alternative approach involves using semiconductor nanowires as the building blocks for large area electronic and optoelectronic devices. A wide range of Group IV, III–V and II–VI semiconductor nanowires can be rationally synthesized with tunable chemical composition, physical dimension and electronic properties, see Duan, X., et al. Nanowire Nanoelectronics Assembled from the Bottom-up, in Molecular Nanoelectronics, Reed, M. ed., American Scientific Publisher, New York (2002); Duan, X. and Lieber, C. M., Adv. Mater. 12:298–302 (2000) and Gudiksen, M. S., et al. J. Phys. Chem.B 105:4062—4062 (2001), each of which are incorporated herein, in their entirety, for all purposes.
The extended longitudinal dimension and reduced lateral dimension makes nanowires the smallest dimension materials for efficient transport of electrical carriers. A variety of nanodevices have been demonstrated using the nanowires, including field effect transistors (FETs), logic circuits, memory arrays, light-emitting diodes (LEDs) and sensors, see Huang, Y. et al., Nano Letters 2:101–104 (2002); Huang, Y. et al., Science 294:1313–1317 (2001); Duan, X., et al., Nano Letters 2:487–490 (2002); Wang, J., et al., Science 293:1455–1457 (2001); Cui, Y., et al., Science 293:1289–1292 (2001); U.S. Patent Appl. No. 60/414,359 and U.S. Patent Appl. No. 60/414,323, each of which are incorporated herein, in their entirety, for all purposes.
While nanowires show promise as high mobility electrical carriers, their use in devices is currently limited by difficulties that arise in harvesting nanowires from the substrates on which they have been synthesized. If the nanowires are not harvested, then the range of nanodevices that employ nanowires are limited because only those substrates suitable for nanowire synthesis can be used in the device. Currently, nanowires are harvested by separating the nanowires from the substrate using mechanical devices, such as a razor blade or other knife-edges. This method has drawbacks including possible physical damage to the nanowires during harvesting. Therefore, there is a need to develop efficient methods of harvesting nanowires from the substrates on which they are synthesized.